1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, particularly a semiconductor device having both an N-type diffusion layer and a P-type diffusion layer.
2. Description of the Related Art
Semiconductor devices having both an N-type diffusion layer and a P-type diffusion layer are manufactured in the following way. First, both the N-type diffusion layer and the P-type diffusion layer are formed within a semiconductor substrate. Then, an inter-layer insulation layer is formed on the substrate. Next, contact holes are made in these layers using one and the same process. Finally, metal wires are formed on the substrate and in the contact holes.
In recent years, the size of the elements of a semiconductor device has been reduced, and the width of the contact holes have been reduced proportionally. The margin for the alignment of contact holes has inevitably decreased. Hence, it is proposed that the SAC (Self-Aligned-Contact) technique is employed in forming diffusion layers in a semiconductor substrate.
FIG. 1 is a graph, in which curve (a) represents the relationship between the size and resistance of a contact formed without applying the SAC technique, and curve (b) illustrates the relationship between the size and resistance of a contact formed by applying the SAC technique. As evident from curve (a), when the SAC technique is not applied, the resistance of the contact greatly increases in inverse proportion to the size thereof. By contrast, as can be understood from curve (b), when the SAC technique is applied, the resistance of the contact does not increase as much in inverse proportion to the size thereof. In view of this, it seems necessary to employ the SAC technique to manufacture next-generation semiconductor devices which have smaller elements than those of the devices manufactured and used at present.
The SAC technique can be accomplished by ion re-implantation or solid-phase impurity diffusion. When ion re-implantation or solid-phase impurity diffusion is performed on a semiconductor IC, such as a CMOS IC, comprising a substrate and an N-type and a P-type diffusion layers, both formed in the substrate, in a semiconductor substrate, and having contact holes made in the diffusion layers by the same process, the N-type impurity diffuses from the N-type diffusion layer into the P-type diffusion layer, and the P-type impurity diffuses from the P-type diffusion layer into the N-type diffusion layer. Consequently, the characteristic of the contacts formed in the contact holes is deteriorated. Further, while the SAC technique is being performed on the N-type diffusion layer, the heat treatment for activating the impurity results in so-called out-diffusion, i.e., the diffusion of the impurity from the P-type diffusion layer via a gas phase. Due to this out-diffusion the impurity concentration in the surface region of the P-type diffusion layer decreases sufficiently to deteriorate the characteristic of the contacts. Still further, during the application of the SAC technique, phosphorus is doped from the BPSG (Boron-Phosphorus Silicate Glass) film, which serves as an inter-layer insulation film, into the P-type diffusion layer. This diffusion of phosphorus also deteriorates the characteristics of the contacts.
FIGS. 2A and 2B are graphs representing the characteristics which the contacts formed in the holes of the N-type and P-type diffusion layers formed in a semiconductor substrate have after arsenic ions have been implanted into the N-type diffusion layer. More precisely, FIG. 2A represents the characteristics of the contact formed in the hole made in the N-type diffusion layer, and FIG. 2B shows the characteristics of the contact formed in the hole made in the P-type diffusion layer. As is evident from FIG. 2B, the contact formed in the hole of the P-type diffusion layer has insufficient characteristics due to the simultaneous forming of holes in the N-type and P-type diffusion layers.